I read somewhere that Sram can have specific values set by the manufacturer when powered on, and I see that as useful for implementing a Soft-Core in a Sram FPGA, but what bitstream should I bias the Sram to have immediately upon power on reset?

Like, I read that it was seen as a hardware trojan, like the manufacturer biased the sram to have a specific value upon power on reset.

Edit: I'll just have all the various free and open source initialization standards, so that some pins may be waiting for a SPI bitstream upon power on reset, some may be waiting for a I2C bitstream, etc.