A FPGA friendly 32 bit RISC-V CPU implementation

Re:A FPGA friendly 32 bit RISC-V CPU implementation by foota on Saturday January 25, 2025 @06:50PM (#42826199)

I was just wondering. It seemed like you had a perspective that I wouldn't associate with someone new to the industry.

[ Parent | on HN ]

Re:A FPGA friendly 32 bit RISC-V CPU implementation by skissane on Saturday January 25, 2025 @07:04PM (#42826288)

I have no idea who they are, but I think you'd find there are lots of "old-timers" (even notable ones) who've never had HN accounts. Any of them could decide to join at any moment

[ Parent | on HN ]