Re:Linux Preparing Support for the RISC-V Framework Laptop 13
by giancarlostoro on Monday September 23, 2024 @10:25AM
(#41626478)
I really want to see more RISC and alternative processor devices, might have to buy one of these to push the drive towards that kind of future where we don't just have only ARM and x86.
Re:Linux Preparing Support for the RISC-V Framework Laptop 13
by seanw444 on Monday September 23, 2024 @10:35AM
(#41626617)
Not just a third option, but one that's properly open and modular. I hate that the only ISAs that are feasible right now are proprietary, and in the x86 case, include backdoor big brother systems by default.
Re:Linux Preparing Support for the RISC-V Framework Laptop 13
by devsda on Monday September 23, 2024 @10:59AM
(#41626875)
They are probably referring to IME in Intel and PSP in AMD.
They are essentially blackboxes that have control over everything in our PCs and nobody including the OS has any visibility into what they do under the hood.
Re:Linux Preparing Support for the RISC-V Framework Laptop 13
by unethical_ban on Monday September 23, 2024 @04:42PM
(#41630295)
At least as important to me, is what is battery life like? With a 61 Wh battery on what is essentially a mobile processor, can I get 20+ hours of use out of it?
Re:Linux Preparing Support for the RISC-V Framework Laptop 13
by brucehoult on Monday September 23, 2024 @11:12PM
(#41632798)
A VisionFive 2 with the same chip uses 3.4 W idle, just with automatic down clocking (I think 375 MHz is the lowest). So that would be potentially 18 hours from a 61 Wh battery. But a laptop also has to drive a screen backlight. On the other hand, maybe the JH7110 has has some lower power sleep mode that was not being used by the software on the VisionFive 2.
Re:Linux Preparing Support for the RISC-V Framework Laptop 13
by brucehoult on Monday September 23, 2024 @09:06PM
(#41632161)
Using the JH7110 chip they are starting with, somewhere around the last Pentium 3s and PowerPC G4s, but quad core instead of single core. And 64 bit. So maybe the closest comparison is the original Core 2 Duo MacBook Air, which ran at 1.6 MHz (for about 4 seconds before it throttled to 1.2 GHz, which the RISC-V shouldn't do).
Or, in the Arm world, a bit slower than a Pi 4, but a lot better than a Pi 3 (especially because 8 GB RAM and PCIe/M.2 not 1 GB and SD card).
I'd expect a 2nd generation motherboard fairly quickly. If it comes in the next six months (Eswin EIC7700) then probably about the speed of a mid-range Core 2 Quad. If mid next year (SG2380) then early i7.
Re:Linux Preparing Support for the RISC-V Framework Laptop 13
by squarefoot on Monday September 23, 2024 @10:30AM
(#41626544)
Including showing a well deserved middle finger to unfriendly graphics hardware manufacturers. This surely sends a message that warms hearts in the FOSS community, but also closes some doors where money counts, and I wish more people in the professional IT world had the same balls.
Amd: https://en.m.wikipedia.org/wiki/AMD_Platform_Security_Proces...
They are essentially blackboxes that have control over everything in our PCs and nobody including the OS has any visibility into what they do under the hood.
https://www.phoronix.com/review/visionfive2-riscv-benchmarks...
It performs pretty poorly compared to even equivalently cheap hardware (~100 USD).
Price is related to production volume. Raspberry Pi boards sell in large numbers and can thus be priced more keenly while retaining a profit margin.
See "VisionFive 2" review: https://youtu.be/ykKnc86UtXg
Or, in the Arm world, a bit slower than a Pi 4, but a lot better than a Pi 3 (especially because 8 GB RAM and PCIe/M.2 not 1 GB and SD card).
I'd expect a 2nd generation motherboard fairly quickly. If it comes in the next six months (Eswin EIC7700) then probably about the speed of a mid-range Core 2 Quad. If mid next year (SG2380) then early i7.
https://invidious.privacyredirect.com/watch?v=x7ozaFbqg00
[1]. https://docs.kernel.org/process/code-of-conduct.html
0. https://github.com/riscv-non-isa/riscv-acpi
1. https://github.com/riscv-non-isa/riscv-uefi
What this means is that RISC-V's work is done.
Compliant implementations exist as well.
0. https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/161547...