It seems endemic with embedded devices. Only big customers get the true list of errata, and of course the errata are random PDFs rather than a useful format. Even just having them on an ftp site with all the errata in one spot would save so much pain!
Re:Memory Mapping an FPGA from an STM32
by kevin_thibedeau on Thursday July 25, 2024 @09:14PM
(#41075076)
Sometimes you don't even get a PDF. Their Ethernet drivers for Cortex-M7 have been broken for years with subtle cache coherency bugs and the only discussion of it is a forum thread with now obsolete example code.
Oh no! I luckily never dealt with the ethernet drivers, but I had plenty of small issues with other drivers
In college, our SoC design instructor told us that to pass the class, our modules should be better than ST's "which is not that high of a bar" :P
Re:Memory Mapping an FPGA from an STM32
by mips_r4300i on Thursday July 25, 2024 @05:22PM
(#41073550)
They churn out new parts and don't bring in fixes. See all the chips in their lineup that have a USB host controller. Every one of them (they use Synopsys IP) will fail with multiple LS devices through a hub.
We talked to our FAE about this and they have no plans to fix it. The bug has existed for years and the bad IP is being baked into all the new chips still.
Solution? Just use yet another chip for its host controller, and don't use a hub.
Re:Memory Mapping an FPGA from an STM32
by mindentropy on Friday July 26, 2024 @03:52PM
(#41081691)
Have you tried PSoC parts? How does that stack with other microcontrollers?
After burning enough company time chasing bugs through ST's crappy silicon, I've had to just swear them off entirely. We're an Atmel house now. Significantly fewer (zero) problems, and some pretty nifty features like UPDI.