Re:Making Sense of Acquire-Release Semantics
by eqvinox on Saturday May 11, 2024 @10:30PM
(#40331955)
The searchable keyword to look for here (re x86) is "Total Store Ordering" (TSO).
(I'm not gonna try to summarize it here because I'd probably get it ever so subtly wrong…)
x86 has a very strong memory model, meaning it is a very poor test platform. Last time I touched atomics I used PowerPC (e500mc & e6500) to test, which was a good thing as it did point me at a problem. Not sure where current ARM falls on this. The uncontested, notorious king of weak memory ordering is DEC Alpha, but these are a bit hard to run these days. If you want to go truly insane, look at DEC Alpha consumer dependency (non-)ordering :)
(I'm not gonna try to summarize it here because I'd probably get it ever so subtly wrong…)
x86 has a very strong memory model, meaning it is a very poor test platform. Last time I touched atomics I used PowerPC (e500mc & e6500) to test, which was a good thing as it did point me at a problem. Not sure where current ARM falls on this. The uncontested, notorious king of weak memory ordering is DEC Alpha, but these are a bit hard to run these days. If you want to go truly insane, look at DEC Alpha consumer dependency (non-)ordering :)