Re:More on x86 – The Chip Letter
by hajile on Thursday April 25, 2024 @11:09AM
(#40158485)
An extra byte to eliminate a MOV via a 3-register instruction is a no-brainer savings.
The extra 16 registers are going to be a lot more fun though. It will also eliminate a lot of those MOVs, but every access will have a 17% penalty going from 5 to 6 bytes.
Meanwhile, ARM/RISC-V can use 32 registers and use 3-register assignments with just 2/4 bytes.
The extra 16 registers are going to be a lot more fun though. It will also eliminate a lot of those MOVs, but every access will have a 17% penalty going from 5 to 6 bytes.
Meanwhile, ARM/RISC-V can use 32 registers and use 3-register assignments with just 2/4 bytes.