Re:More on x86 – The Chip Letter
by librasteve on Thursday April 25, 2024 @01:26PM
(#40160495)
i dont think so ... without reciprocal square root, you would need to issue a square root and a reciprocal instruction sequentially and trust your compiler to unroll, pipeline ir whatever. anyway, square root on an IEEE P754 FPU is going to use something like microcoded newton-raphson with a variable number of cycles to reach sufficient accuracy. BUT, the result of the two chained instructions will often be different to that of the unified instruction (like mac is different to multiply then add) so this MAY be a philsophical decision, or more likely someone could code LINPACK tighter
it was important at the time of the original RISC as anything that could not be handled by the single-cycle execution stage would significantly increase the complexity of the pipeline.
Today pipelines are orders of magnitude more complex than the original RISC, so it doesn't really matter.