Re:More on x86 – The Chip Letter
by userbinator on Thursday April 25, 2024 @09:55AM
(#40157643)
the memory speeds are increasing and approach those of the CPU ― that's definitely not true today
There was a brief time in the 80s when that was true, but clearly hasn't been for a while. (Why else would caches be necessary?)
chip area used for complex instructions can be used for something better, like caches — is it really that true today
Some of Intel's CPUs can turn off sections of their caches to save power.
Complex instructions can be easily and more performantly simulated by combining several simpler ones
That now happens with RISCs too, e.g. there are ARM instructions which get split into multiple uops, and of course the larger amount of simpler instructions is essentially what uops are. Patterson wrote the paper at a time when the Pentium's uop-decoding approach didn't exist and "traditional" CISCs were all sequentially microcoded.
Apples-to-apples comparisons here are not quite easy
Pun intended? I believe there was plenty of discussion on that when they came out with the M1, and some have attributed that to process advantage instead of uarch or ISA.
There was a brief time in the 80s when that was true, but clearly hasn't been for a while. (Why else would caches be necessary?)
chip area used for complex instructions can be used for something better, like caches — is it really that true today
Some of Intel's CPUs can turn off sections of their caches to save power.
Complex instructions can be easily and more performantly simulated by combining several simpler ones
That now happens with RISCs too, e.g. there are ARM instructions which get split into multiple uops, and of course the larger amount of simpler instructions is essentially what uops are. Patterson wrote the paper at a time when the Pentium's uop-decoding approach didn't exist and "traditional" CISCs were all sequentially microcoded.
Apples-to-apples comparisons here are not quite easy
Pun intended? I believe there was plenty of discussion on that when they came out with the M1, and some have attributed that to process advantage instead of uarch or ISA.