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A comment on An unusual 7400-series chip implemented with a gate array. Parent comment

Re:An unusual 7400-series chip implemented with a gate array by pclmulqdq on Saturday March 30, 2024 @10:46PM (#39880896)
I have heard of this structure also referred to as a PLA - programmable logic array, and I think a ULA is specifically for a PLA that is embedded in the empty space of a bigger design (so that in case something is broken, a debug is one mask, not a full respin).

I am not sure that Wikipedia is out-of-date enough to have the precise terminology, but I also may be wrong.

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Re:An unusual 7400-series chip implemented with a gate array by kens on Saturday March 30, 2024 @11:16PM (#39881061)
The terminology is a bit of a mess, but usually a PLA is highly structured with an AND plane and an OR plane, so it implements sum-of-products logic. A gate array is more general, with arbitrary connections.
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