News for hackers. Stuff that matters.
Re:Reading Parallel nor Flash with JTAG by Boardbricker34 on Monday March 25, 2024 @03:13PM (#39820210)
Updated. Curious about how you wound up tying all 30+ pins on the pico (26 gpio)
Re:Reading Parallel nor Flash with JTAG by monocasa on Monday March 25, 2024 @03:26PM (#39820346)
You can put that nor flash into byte mode, saving you 8 data lines in exchange for an extra address line.

You can also throw a shift register in to increase the number of GPIOs.

Re:Reading Parallel nor Flash with JTAG by Boardbricker34 on Monday March 25, 2024 @04:00PM (#39820640)
Yes, I suppose this would be a functional way to do this. It would take much longer (double or quadruple depending on data bus size). But none the less, it could work.
Re:Reading Parallel nor Flash with JTAG by monocasa on Monday March 25, 2024 @04:48PM (#39821108)
I think you'll find that even that is much quicker than twiddling lines via boundary scan. At best, JTAG boundary scan is basically one giant shift register generally hundreds to thousands of bits long. Every cycle you'd need to shift out the whole thing even if you change the state of one signal.