I still doubt that. IMO, cache lines are larger than the largest item a CPU can read because the probability that the extra data will be needed soon is high enough to offset the extra work needed to read that larger cache line and the (few) transistors needed to increase cache line size.

In some sense, large cache lines are just cheap ways to implement speculative reads.

See for example http://dl.acm.org/citation.cfm?id=255272 (pay walled, but the abstract is clear enough):

"A significant observation is that, although increasing line sizes can result in a higher hit ratio, it also considerably increases traffic to main memory, thereby degrading the performance."