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Re:AMD's CDNA 3 Compute Architecture by viraptor on Monday December 18, 2023 @06:30AM (#38681252)
> Why would you want unified address space?

Mac APU I guess. Or Jetson/Tegra kind of things.

Re:AMD's CDNA 3 Compute Architecture by Const-me on Monday December 18, 2023 @08:12AM (#38681943)
My laptop has a single GPU inside Ryzen 5 5600U i.e. unified memory, all consoles also have unified memory. These devices are fine with traditional GPU programming model, where shaders only have access to well-shaped pieces of memory accessible through resource views or UAVs.

CPU-style memory access in GPU kernels technically possible (CUDA did it) but unfortunately rather hard. The feature requires hardware support inside GPUs (need pointers, they need to be 64-bits, need 64-bit integer arithmetic instructions), and therefore not going to work on many current GPUs. It becomes harder to compile and optimize GPU-running code. On devices without physically unified memory, the performance of these kernels gonna suck.

Luckily, none of that is needed to implement D3D11 or Vulkan backend for PyTorch. PyTorch is not a general purpose GPGPU runtime, it’s merely a high-level library which manipulates tensors and implements a few BLAS routines operating on them. It’s easy to allocate a GPU resource for each tensor being manipulated.

Re:AMD's CDNA 3 Compute Architecture by zozbot234 on Monday December 18, 2023 @09:15AM (#38682805)
Vulkan backend for PyTorch exists. It's mostly tested on Android, but it's there. PyTorch maintainers though are reluctant to advertise that as "support" because complete, reliable support for the zillion 'operators' PyTorch includes is quite a different challenge.