Re:Intel, Samsung, and TSMC Demo 3D-Stacked Transistors
by projectileboy on Sunday December 17, 2023 @02:00AM
(#38670947)
I'm ignorant of this space, but it seems like the obvious solution for heat dissipation is to layer lattices and not solid layers, in order to increase the overall surface area of the chip. I assume the manufacturing is too difficult...?
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