Re:Cortex X2: ARM aims high
by mappu on Saturday October 28, 2023 @06:02PM
(#38053813)
On x86 the cache is implicit when you touch memory, and there are many ISA ops (push, call, ...) that implicitly update stack memory.
But if you never call those, it is possible to access the cache explicitly. Coreboot have a custom in-tree compiler, ROMCC [1] that compiles C to a subset of x86 that never emits memory operations.
They use this to treat cache as RAM [2] for a brief period during early boot before the RAM itself gets initialized.
But if you never call those, it is possible to access the cache explicitly. Coreboot have a custom in-tree compiler, ROMCC [1] that compiles C to a subset of x86 that never emits memory operations.
They use this to treat cache as RAM [2] for a brief period during early boot before the RAM itself gets initialized.
1. https://github.com/wt/coreboot/tree/master/util/romcc The whole compiler is a single C file
2. https://www.coreboot.org/data/yhlu/cache_as_ram_lb_09142006.... Perform s/LinuxBIOS/Coreboot/ in your head as you read