Re:Major Changes at RISC-V Designer SiFive
by sweetjuly on Thursday October 26, 2023 @04:01AM
(#38022983)
I keep coming back to this table and wondering why the conclusion was that 16-bit instructions were necessary and not more complex 32-bit instructions were necessary. For example, ARMv8's LDR and LDP instructions are amazing and turn what is often 3-4+ 32-bit RISC-V instructions into just one 32-bit instruction. Making C optional and building a new "code size reduction" extension that is more suitable for large application processors (which can reasonably be assumed to use uops) would help so much more.
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Re:Major Changes at RISC-V Designer SiFive
by snvzz on Thursday October 26, 2023 @01:00PM
(#38028444)
> Making C optional and building a new "code size reduction" extension that is more suitable for large application processors (which can reasonably be assumed to use uops) would help so much more.
Andrew at SiFive disagrees vehemently[0].
Re:Major Changes at RISC-V Designer SiFive
by sweetjuly on Thursday October 26, 2023 @02:57PM
(#38030197)
Andrew seems to mostly disagree with Qualcomm in general and is rejecting the idea not so much out of technical merit but because he doesn't believe them. Qualcomm is definitely not alone with its dislike of the C extension and trying to wholesale dismiss criticisms of it because they're coming from Qualcomm is not appropriate.
Re:Major Changes at RISC-V Designer SiFive
by snvzz on Thursday October 26, 2023 @09:08PM
(#38033581)
SiFive made a technical case[0] on keeping C, too.
>Qualcomm is definitely not alone
It's also worth noting that they tried to appropriate Rivos's opinion, only to be called out[1].
0. https://lists.riscv.org/g/tech-profiles/topic/slides_on_reta...