Re:Major Changes at RISC-V Designer SiFive
by trealira on Tuesday October 24, 2023 @09:15AM
(#37998757)
Not having the compressed instruction set extension wouldn't make Qualcomm's CPUs not RISC-V. They just wouldn't be compliant with the RVA23 profile.
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Re:Major Changes at RISC-V Designer SiFive
by snvzz on Wednesday October 25, 2023 @05:11AM
(#38010828)
>wouldn't make Qualcomm's CPUs not RISC-V.
Only if they use the op space reserved for custom extensions.
If they don't and instead step all over space that belongs to C, then they would indeed not be RISC-V.
Re:Major Changes at RISC-V Designer SiFive
by trealira on Wednesday October 25, 2023 @09:14AM
(#38012432)
Yeah, when I wrote that, I didn't realize they were also arguing for an alternate extension that would add address modes and the like. If they fail to add this to the standard, but go ahead with implementing their extension anyway, then their CPUs would be RISC-V but with a custom instruction set extension. RV64g + their custom stuff.
Re:Major Changes at RISC-V Designer SiFive
by snvzz on Wednesday October 25, 2023 @09:55AM
(#38012813)
Only if they use custom extension encoding space exclusively, and do not step over standard encoding space, such as what's reserved for the C extension.
Which is what I understand they're doing. Thus could not be called RISC-V.