Minor correction: Cooper Lake added bf16. IEEE half-float fp16 only came in Sapphire Rapids (I am currently adding support for it in Highway).
deleted my initial reply as I misread "bf16" in your comment as fp16 and was thoroughly confused. What I Get for commenting before fully awake, sorry lol.
And yes, true. That list I just copied from wikichip, didn't think to cross verify what it was conveying in those paranthesis as the question was about AMD not Intel. That said, not sure why they have FP16 attributed to Cooper Lake and not SR.
EDIT: Ayy, you can edit wikichip. Fixed it over there (assuming there's not some moderation issue? never submitted anything over there), but too late to edit original HN Comment.
- AVX512ERAVX512PF (Knights Landing)
- AVX512 4VNNIW, 4FMAPS (Knights Mill)
- VP2INTERSECT (Tiger Lake)
- FP16 (Cooper Lake)
You can see a table here showing cpu's AVX512 support[0], and wikicpu also has that data in a list [1], along with more detailed info. It's worth noting all data I can find specifically talks about AVX512 support in terms of the architecture (Zen4), not anything specific product families such as ryzen vs epyc implementations. It's possible there is/will be some artificial product segmentation going on (like what Intel did retroactively with Alder Lake to disable AVX512) but I've not seen any mention of it regarding AMD's products. I mention this because Intel has kinda been all over the place with AVX512 implementation, and there's a big difference between Enterprise and Consumer in how they deliver/treat AVX512. AMD obviously is a different company with different practices, but with only 1 generation to go off of it's hard to speculate on a trend, and AVX512 can be an expensive implementation. Point being: It's unfortunately complicated AND subject to change.
The "big" one here for ML/DL/AI vs Intel's Sapphire Rapids (and presumably going forward) is FP16 not being supported on AMD. Of course, it's contextual as to whether that's relevant to you though.
[0]: https://en.wikipedia.org/wiki/AVX-512?oldformat=true#CPUs_wi...
[1]: https://en.wikichip.org/wiki/amd/microarchitectures/zen_4#Ne...
My experience is primarily with Intel's implementation of AVX512 in their Xeon products for DL/AI. I can expand on that if interested, but unfortunately haven't had a chance to play with AMD Zen4 yet in that domain, and it's gonna be a while till I can get hands on with a Epyc 9000 probably.
EDIT: Fixed typos