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Re:The legend of “x86 CPUs decode instructions into RISC for... by brucehoult on Sunday June 18, 2023 @08:32PM (#36385956)
Berkeley RISC I and RISC II had register windows, and led to SPARC. MIPS was Stanford.

And, yes, they learned the hard way that register windows are a bad idea. Patterson says they did it because their compiler didn't have as good register allocation as Stanford's compiler.

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