It depends on what you mean by possible. The vhdl_lang crate solves many hard problems required to do document generation such as parsing, disambiguation and connecting references. It solves it in a much more complete and better way then a regex ever could.

So vhdl_lang is a good base for a document generator but it does not implement one today. My hope with this project was to create a generic VHDL language backend that others could build tools upon instead of reinventing the wheel. I myself have focused on the language server and core library itself and not on document generation.