Wasn't this already sorta common knowledge? Almost the tricks in recent process generations to increase density have been vertical. FinFETs et. al. work by stretching the transitor upwards to increase gate area, so it drives harder and you need fewer of them to implement the same logic. But the actual pitches of the gate and fins haven't been changing nearly as fast, so the smallest circuits aren't seeing much benefit.

A SRAM cell is 6-8 transistors all connected internally with only a read and data line coming out (well, and the power rails). That's already horizontally packed, making the transistors beefier won't help anything.