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A comment on SK Hynix Reveals DDR5 MCR DIMM, Up to DDR5-8000 Speeds for HPC. Parent comment

Re:SK Hynix Reveals DDR5 MCR DIMM, Up to DDR5-8000 Speeds fo... by NovemberWhiskey on Monday December 12, 2022 @11:56AM (#33957000)
Right - I think, at this point, that L1 cache latency is worse than main-memory latency on a 'per CPU clock' basis than it was in the late 1990s!
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Re:SK Hynix Reveals DDR5 MCR DIMM, Up to DDR5-8000 Speeds fo... by rbanffy on Monday December 12, 2022 @02:14PM (#33958845)
Makes sense for a larger cache to take longer to decode an address.
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