This wasn't entirely out of discrete components; they had PALs, presumably representing fairly large sections of the processor's internal subsections.
Re:Motorola 68030 wire wrap prototype
by YakBizzarro on Tuesday November 29, 2022 @01:23AM
(#33784290)
The modern equivalent is simulation on a series of big FPGA, probably this one https://www.xilinx.com/products/silicon-devices/fpga/virtex-...
Presumably they don’t create the hardware in FPGA and just simulate the thing in software?
Re:Motorola 68030 wire wrap prototype
by an-unknown on Tuesday November 29, 2022 @10:15AM
(#33788547)
Simulation in software is much slower than running the design in FPGAs.
M2 is 20 billion transistors.
You'll get different answers depending on whether you're doing this as transistors or 74 series logic or whatever, but if we take discrete transistors and jam them in at 4 per square centimeter, that works out as 5bn cm^2 or half a square kilometer.
Frequency will then be limited by propagation delay across a square of that size. Maybe a few hundred kilohertz? Power .. megawatts? There's going to be a visible heat haze shimmering over your half square kilometer of transistors.
Re:Motorola 68030 wire wrap prototype
by doctor_eval on Tuesday November 29, 2022 @03:53PM
(#33793130)
That is a fantastic image. Thanks!
Inquiring (and lazy) minds want to know.