Which spurious signals do you mean? I'm assuming you're talking about stuff well outside the intended sidebands that result from the modulation.

If we were talking about AM I would assume you mean the audio signal isn't bandlimited and so high-frequency audio components get upconverted by the carrier frequency, but I don't know what the spectrum of an FM signal looks like. Are we talking about a broad comb that results in an analogous way from sudden changes in the frequency? Do they go away if you vary the frequency of a 50%-duty-cycle square wave smoothly, like maybe with second- or third-order continuity, instead of suddenly?

I'm talking about the broad band of spectral components (both close in and further out) which are generated by the synthesizer. These are a separate issue to any sidebands generated by the modulation process.

see https://en.wikipedia.org/wiki/Phase_noise

It's surprisingly difficult to generate a clean carrier which doesn't have a broad band of spectral components, but this is essential for the design of effective Receivers and Transmitters.

These sidebands are generated by noise in the oscillator, spurs caused by mixing products, jitter in the synthesiser, and non-linearities in the modulation process.

The bottom line is to look at the output with a high-quality spectrum analyser and compare the result with the spectral mask which is published by the FCC.

A broad band of spectral components generated by the Raspberry Pi's clock generator because it has a lot of phase noise? Or do you just mean that in general that many circuits that generate clock signals can have phase noise but that you don't have any idea about this one in particular?

He doesn't seem to be using a mixer, so I don't think you'll get any spurs caused by mixing products in this case.

I'm no expert obviously but I'd think the phase noise of a PLL driven from a quartz crystal would be negligible.

In the case of PiFM, the clock generator is being operated out of spec by a wide margin - it is rated for operation up to 25 MHz, but the code operates it at 100Mhz.

That makes it do some weired things - and I suspect one of those is that when adjusting the clock frequency (by changing the divisors), sometimes it stops oscillating for many microseconds.

Not sure what impact that has in the frequency domain, but I can't imagine it's good...

Did you try hooking it up to a spectrum analyzer or a fast scope with FFT?

A PLL is one of the worst for phase noise. It will have a divider chain which will produce jitter and harmonics of the ref osc, and must absolutely rely on careful tuning of the AFC loop to null out these spurs. And as the filter will be digital rather than analog, there is no chance of optimizing it.

But that is before we get to the modulation. That again will be digital (rather than analog) so by definition will be chock full of jitter, especially if the FM is generated by stepping the clock frequency in finite steps. Not only will this generate large amounts of jitter, but it will generate spurs of the PWM clock over a wide range of frequencies.

I see, thanks!