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A comment on RISC-V Public review for standard extensions Zc.

Re:RISC-V Public review for standard extensions Zc by sylware on Saturday October 15, 2022 @06:28AM (#33213493)
It seems risc-v is missing the "small and big", "hardware accelerated", equilavent of x86 "rep stosX" and "rep movsX". Basically hardware memcpys and memsets. Heard latest arm ISA has them.

risc-v implementors/experts out there: is this true?

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Re:RISC-V Public review for standard extensions Zc by childintime on Saturday October 15, 2022 @07:54AM (#33214027)
not an expert, but it seems to me the vector extension should be able to do this.
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Re:RISC-V Public review for standard extensions Zc by sylware on Saturday October 15, 2022 @09:45AM (#33214757)
Like on ARM with neon and x86 with avx, but even on those, they got direct hardware acceleration without neon/avx of memcpys and memsets (big and small).
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