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Re:Forth Inventor Chuck Moore's $20 144 core CPU now in full... by neuraxon77 on Tuesday November 22, 2011 @07:23PM (#3268111)
"Between nodes there are 18 bit, bidirectional parallel buses called Comm Ports. The handshaking on these ports is trivially simple and the latency and jitter are low, on the order of gate delays, tens of picoseconds. When a node is reading or writing a Comm Port, it proceeds with no delay if its partner is ready to transfer data. If the partner is not yet ready, the node waits until it is. While waiting, a node’s power consumption drops, within picoseconds, to nothing but leakage. When the partner becomes ready the idle node resumes its work within picoseconds."

http://www.greenarraychips.com/home/documents/greg/WP002-100...

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