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A comment on RISC-V announces first new specifications of 2022 adding to 16 ratified in 2021. Parent comment

Re:RISC-V announces first new specifications of 2022 adding ... by pclmulqdq on Tuesday June 21, 2022 @09:31AM (#31823714)
Wait, having no DIV instruction will result in faster code than having a DIV that traps. The compiler picks up the code that happens in the trap and can optimize it. For example, the code for an 8-bit division can be a lot faster than a 32-bit DIV on a microcontroller.
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Re:RISC-V announces first new specifications of 2022 adding ... by Someone on Tuesday June 21, 2022 @12:11PM (#31825608)
There’s also the overhead of trapping (registers get saved, the CPU may switch to kernel mode). For a single integer division, chances are that adds significant overhead compared to a subroutine call (let alone inlined code)
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