If you are interested in this, you might find these useful.
1) Optimisation Techniques for Stack Based Architectures - Christopher Bailey
2) Investigating Opportunities for Instruction-Level Parallelism for Stack Machine Code - Shi Huibin
3) Second-Generation Stack Computer Architecture - Charles Laforest
[1] https://www-users.cs.york.ac.uk/~chrisb/main-pages/publicati...
[2] https://www-users.cs.york.ac.uk/~chrisb/main-pages/publicati...
Moron here, what is that in this context?
(Nothing wrong with not being familiar, i wasn't either, but it was totally reasonable for original poster to use them in context)
Yes, but it's a tech site with a broad audience. I still think it's nicer to avoid any but the most commonly understood acronyms. It's a hard call to make but there's no harm erring on the side of caution.
Maybe I'm too prickly on this topic. In this particular case I think it's probably OK but I often see people misjudge this to the point where it's genuinely confusing for most of the audience.
> This essentially makes WebAssembly a register machine without liveness analysis, but not only that, it’s a register machine that isn’t even in SSA form - both of the tools at our disposal to do optimisation are unavailable. In a true, optimising compiler we can recreate that information, but WebAssembly was already emitted by a compiler that generated that information once.