A lock-free, concurrent, generic queue in 32 bits

Re:A lock-free, concurrent, generic queue in 32 bits by zozbot234 on Sunday May 15, 2022 @06:18AM (#31386585)

But then those accesses have to be protected by a lock in order to enforce invariants between "start" and "end". The whole point of representing both with a single atomic value is that this makes it trivial to preserve those required invariants.

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Re:A lock-free, concurrent, generic queue in 32 bits by gpderetta on Sunday May 15, 2022 @06:57AM (#31386741)

Because the queue grows only in one direction and it is consumed in the other direction, reading a stale value from the other side is still safe, so two-word atomicity is not needed.

In fact the other side value is normally cached in a local memory location so to amortize the cost of roundtrips over multiple reads and writes.

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Re:A lock-free, concurrent, generic queue in 32 bits by yvdriess on Monday May 16, 2022 @03:40AM (#31394466)

Only for SPSC. You need H/T consistency in other cases for full/empty checks.

Cmon AMD/Intel, give us hardware queues already :)

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