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A comment on Apple's M1 Ultra comes with a 32MB TLB bottleneck. Parent comment

Re:Apple's M1 Ultra comes with a 32MB TLB bottleneck by zozbot234 on Thursday April 14, 2022 @02:54AM (#31024081)
> You might end up masking part of the cost of some stalls if you are able to swap in other ready-to-run tasks.

You'd need SMT to do this for memory stalls, and Apple M1 doesn't use SMT - they have the same amount of logical cores (hardware threads) and physical cores.

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Re:Apple's M1 Ultra comes with a 32MB TLB bottleneck by monocasa on Thursday April 14, 2022 @08:51AM (#31026266)
Source? Every unified programmable GPU I've seen uses SMT, including the PowerVR GPUs going back to the SGX days. It's core to how they approach modern memory hierarchies.
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Re:Apple's M1 Ultra comes with a 32MB TLB bottleneck by monocasa on Thursday April 14, 2022 @12:51PM (#31029576)
Looking into it more, AGX2 (like pretty much every fairly high perf modern GPU) is heavily SMT, allowing up to 1024 simultaneous threads per core depending on how many registers each shader invocation needs.

https://rosenzweig.io/blog/asahi-gpu-part-3.html

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