Re:Addressing Criticism of RISC-V Microprocessors
by avianes on Sunday March 20, 2022 @02:08PM
(#30745035)
The encoding space is not the number of bits used to encode an instruction,
the encoding space is the ratio of values that encode a valid instructions over the total number of instructions that could be encoded.
As an example, in an ISA with 8-bits fixed instruction length and 8 registers (reg index encoded on 3 bit):
If the last 2 bits are the opcode and we define 2 instructions (eg. AND, XOR) that manipulate 2 registers (3 bits + 3 bits), then instruction word values 0b00_000_000 to 0b01_111_111 might encode these two instructions (ignore "_" they are separators).
Therefore, instruction word values from 0b10_000_000 to 0b11_111_111 remain free, which represents half of the encoding space.
So half of the encoding space remains free.
This means we still have room to put new instructions.
Similarly, RISC-V valid instructions use almost all the available bits, but there is still room in the encoding space because some opcodes remain free.
As an example, in an ISA with 8-bits fixed instruction length and 8 registers (reg index encoded on 3 bit):
If the last 2 bits are the opcode and we define 2 instructions (eg. AND, XOR) that manipulate 2 registers (3 bits + 3 bits), then instruction word values 0b00_000_000 to 0b01_111_111 might encode these two instructions (ignore "_" they are separators).
Therefore, instruction word values from 0b10_000_000 to 0b11_111_111 remain free, which represents half of the encoding space. So half of the encoding space remains free.
This means we still have room to put new instructions.
Similarly, RISC-V valid instructions use almost all the available bits, but there is still room in the encoding space because some opcodes remain free.