More explanation in the appendix on the instruction set. The opcodes are 13, 23, eb and fb:
http://www.laughtonelectronics.com/arcana/BrideOfSon%20KK%20...
Bottom of the list.
1) you have to detect near jumps that jump back inside one bank. (at least from instruction ending on 0xffff to instruction starting on 0x0000, on the other hand you can plausibly ignore this as it is very unlikely case)
2) more importantly, I understand that this coprocessor contraption does not interact in any way with lower 16 bits of address bus. You would need to actually snoop on address bus and detect the wraparound and as this thing is built from MSI logic, detecting transition 1 -> 0 on all bits of address bus - while conceptually trivial - would require significant amount of hardware. You can detect 1 -> 0 transition only on 15th bit of address, but then you really need to detect jumps in microcode and disable this logic in case of jump.