Re:Apple M1 Ultra
by atq2119 on Tuesday March 08, 2022 @10:08PM
(#30610474)
I don't think there's anything specifically different about the reorder buffer between x86 and ARM.
The reorder buffer size is just a logical consequence of the frontend width.
And yes, scaling an Aarch64 frontend is dead simple compared to x86 due to the fixed instruction width. The disadvantage of x86 is serious, but I don't know if we can count it out quite yet. This is the first time Intel and AMD got any serious pressure on that front. I'm sure they're taking the challenge seriously, and it'll take some years before we'll see the results.
Re:Apple M1 Ultra
by sroussey on Wednesday March 09, 2022 @10:35AM
(#30615580)
x86 and ARM have different memory access assumptions which affects the reorder buffer in material ways. Apple added something to their chips to use the x86 memory model when flagged for Rosseta2.
The reorder buffer size is just a logical consequence of the frontend width.
And yes, scaling an Aarch64 frontend is dead simple compared to x86 due to the fixed instruction width. The disadvantage of x86 is serious, but I don't know if we can count it out quite yet. This is the first time Intel and AMD got any serious pressure on that front. I'm sure they're taking the challenge seriously, and it'll take some years before we'll see the results.