The RISC-V Experience

Re:The RISC-V Experience by ncmncm on Sunday January 16, 2022 @12:41AM (#29953736)

My favorite ways to optimize programs instead pessimizes them on RISC-V.

I have read claims that the Bitmanip extension, or maybe just parts of it, will end up in the "profile" that full-featured desktop-scale parts will support, but I have not found any way to verify that. With desktop-style boards already being sold, is there any reasonable expectation that default builds for 64-bit RISC-V will ever assume those Bitmanip instructions are there, and use them in optimizations? Or are the extensions more of a cruel joke, suggesting to us in detail what we might have had, but can't really ever?

[ Parent | on HN ]

Re:The RISC-V Experience by znwu on Monday January 17, 2022 @07:41PM (#29973456)

RVA22 Profile: https://github.com/riscv/riscv-profiles/blob/main/profiles.a...

Zba and Zbb are both mandatory extensions. Zbc, Zbkb, Zbkc, Zbkx are all supported extensions. Zba and Zbb contain most useful bitmanip instructions. For example, POPCOUNT is in Zbb.

Implementations are free to choose their extension combinations and go out of standard profiles. But doing so will void them from mainstream *nix support.

Edit: Also for the already sold units, there is a RVA20 profile without any bitmanip which most of them will match. You can assume no newer application uarch will use RVA20 since year 2022.

[ Parent | on HN ]

Re:The RISC-V Experience by ncmncm on Monday January 17, 2022 @10:59PM (#29974913)

Thank you, this is very helpful. I am more optimistic about the usefulness of RISC-V than before reading this.

[ Parent | on HN ]