5.5 mm in 1.25 nanoseconds

Re:5.5 mm in 1.25 nanoseconds by brucedawson on Thursday January 13, 2022 @12:40PM (#29923864)

Reading from L2 requires sending down a request and then waiting for the response. This makes me realize that the actual speed is 5.5 mm in 0.625 ns because it's a two cycle delay in each direction. I'll update the article.

But, this request/response means that a ring bus seems unlikely because a unidirectional ring bus should make the sum of the request/response times identical for all CPUs, if I'm understanding correctly.

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Re:5.5 mm in 1.25 nanoseconds by marcan_42 on Thursday January 13, 2022 @03:54PM (#29926703)

I was thinking bidirectional ring bus in my model; indeed if it were unidirectional you'd end up with the same result for all CPUs.

FWIW, the Cell used a bidirectional ring bus network, and it's of the same generation and happens to share technology heritage with the XCPU... (very similar PowerPC core) :-)

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Re:5.5 mm in 1.25 nanoseconds by kens on Thursday January 13, 2022 @01:24PM (#29924540)

You mentioned a document with a detailed description of the internals of the Xbox 360 CPU. I don't suppose that document is available to the public?

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Re:5.5 mm in 1.25 nanoseconds by brucedawson on Thursday January 13, 2022 @07:19PM (#29928918)

Sorry, I've never seen a non-NDA document with full details. Some information was released but it was a bit spotty.

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