Re:A 1970s Cray-1 hard drive has been imaged
by pflanze on Wednesday September 07, 2011 @02:59PM
(#2970906)
> 30ms for a Cray 1 was only 2400 clock cycles
2.4 million clock cycles. (According to Wikipedia, the Cray-1 had a 80 MHz clock, which you also mention in your other post.)
Re:A 1970s Cray-1 hard drive has been imaged
by mjb on Wednesday September 07, 2011 @03:31PM
(#2971025)
You are indeed correct. That's kind of how it worked in my head (about 12x change) but I didn't type it that way for some reason.
Re:A 1970s Cray-1 hard drive has been imaged
by SoftwareMaven on Wednesday September 07, 2011 @10:03AM
(#2969517)
And buffer bloat is confusing the protocols in the process.
This is going to have big consequences for the way that we design systems in the future. Transferring a large amount of data is going to be cheap and fast. Seeking, handshaking, back-and-forth and any other latency sensitive operations are going to be slow and expensive. This has already played a big role in algorithm design in HPC, and is going to start being felt to a much larger degree in the wider field over the next decade. As the latency/throughput ratio gets bigger, the tradeoffs behind optimal system design will change.
30ms for a Cray 1 was only 2400 clock cycles. 8ms for a modern CPU is around 30 million. That's a big change.