MyHDL: Using Python as a hardware description and verification language

Re:MyHDL: Using Python as a hardware description and verific... by mst_moonshine on Friday November 26, 2021 @06:39AM (#29349302)

Using modern languages for hardware design seems to be a tendency today. I wonder how does MyHDL compare to Chisel? Chisel is another hardware description language based on Scala, which has already been wildly used in the RISC-V community. Check it out here: https://www.chisel-lang.org

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Re:MyHDL: Using Python as a hardware description and verific... by shash on Saturday November 27, 2021 @04:00AM (#29358749)

And I've been involved in a project that's making heavy use of Bluespec: https://github.com/B-Lang-org/bsc/

Same problem though - you have to transpile it down to Verilog to use it in anything beyond a simulation.

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