Re:SPI: The serial peripheral interface [video]
by SV_BubbleTime on Monday November 22, 2021 @09:05PM
(#29313837)
I’ve never seen SPI that doesn’t require a CS line. The whole way that daisy chaining works is this. Do you have a device off hand that uses addressable SPI, I want to see how they explain it in a datasheet.
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Re:SPI: The serial peripheral interface [video]
by Taniwha on Wednesday November 24, 2021 @12:03AM
(#29327069)
I'm afraid the two I can think of have non-publicly available data sheets: one is a cablecrypto device, the other a SLIC. The SLIC is the one with the daisy chain - they want to be able to build phone systems with a SLIC for every slot in a T1 frame - so 24 SLICs - they're trying to avoid 24 CS pins and 24 interrupts on the attached signalling CPU