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A comment on Practice Problems for Hardware Engineers. Parent comment
Clock domain crossing methods. And clocking, PLLs, clock distribution, reset strategies etc.
HW/SW co-design with CPUs acting as control paths and APIs to allow SW to supervise and control the HW efficiently.
Modern languages and tools - SystemVerilog, esp for verification is a good example. Formal verification tools.
Debugging and testing. JTAG, Scan chains, BIST etc.
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Clock domain crossing methods. And clocking, PLLs, clock distribution, reset strategies etc.
HW/SW co-design with CPUs acting as control paths and APIs to allow SW to supervise and control the HW efficiently.
Modern languages and tools - SystemVerilog, esp for verification is a good example. Formal verification tools.
Debugging and testing. JTAG, Scan chains, BIST etc.