Re:Generating a QR code with only ARM Assembly
by haolez on Wednesday September 08, 2021 @08:04PM
(#28464579)
Wouldn't -Os optimize for size better than hand-crafted ASM? Genuine question.
Re:Generating a QR code with only ARM Assembly
by userbinator on Wednesday September 08, 2021 @09:20PM
(#28465128)
My experience is mostly with x86, where the answer is a definitive "no"; for ARM, my guess is "likely no" --- it's a RISC, so instruction selection isn't as critical, and all instructions are fixed-width so again there isn't as much flexibility in instruction selection (e.g. in x86 a "xor reg, reg" is the canonical way to zero a register, and explicit loading with a constant 0 is very much discouraged and a few bytes bigger, even compilers know about that now.) That said, I've also seen compilers do ridiculous stupid things which no human ever would.
...unless you're working in certain types of embedded development, where rewriting code in Asm to save going to the next larger size of device is a semi-common occurrence.
I'm not really familiar with ARM Asm so I can't easily point out optimisation opportunities like I can with x86, but would like to see a size comparison with a stripped-down C implementation (of similar capability) put through a compiler.