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Re:Open-sourcing a more precise time appliance by LeifCarrotson on Wednesday August 11, 2021 @10:14PM (#28150866)
That's a level of nitpicking that I didn't bother with.

Of course the Verilog or VHDL is just plaintext, which you can modify anywhere, but to actually do anything with it you need to compile it into a bitstream.

It does make me wonder if someone could set up a CI server to get around proprietary compilers like Vivado. Point the community resource at your source and get back a binary! Obviously you'd need to strip the license ID...

Re:Open-sourcing a more precise time appliance by anon_tor_12345 on Wednesday August 11, 2021 @11:02PM (#28151260)
i didn't mean to nitpick and it's not nitpicky since there are now open toolchains (though not for xilinx) that you support verilog as a frontend

http://www.clifford.at/yosys/ http://www.clifford.at/icestorm/