So I will preface this with that I'm not an expert. But as I understand it, multicore systems are already frequently NUMA, but to a degree that most stuff (I am eliding categories of code here, but you get the idea) don't have to really care. From my understanding of how all this works, the difference of speed and bandwidth for LPDDR versus DDR seems like risking significant complexity for an expandability that few people would use and in turn cause an everything-or-nothing problem, where either high-performance code is written assuming anybody might have this, or nobody assumes it and you get a pile of stalls.
One possible other compromise could be soldered LPDDR RAM, but with a DIMM expansion slot for DDR as well. I wonder whether the DDR could be switched off and the baseline power draw eliminated if the RAM usage was below needing it.