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A comment on The Ice-V: a simple, compact RISC-V RV32I implementation in Silice. Parent comment

Re:The Ice-V: a simple, compact RISC-V RV32I implementation ... by sylefeb on Monday June 21, 2021 @05:05AM (#27577481)
Thanks for the feedback and pointers, I'll be looking into both issues (AGPL and the question of generated code).
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