I actually was a hardware developer for a while, and I'm not sure this will pan out like the author thinks. A 1 GHz CPU on an FPGA won't happen, even a 7 nm FPGA. Also, host memory latency and bandwidth will likely kill any hopes of putting the special- purpose CPU far from its memory.

The best outcome is a new RISC-V matrix extension, though, which sounds pretty cool and useful given the Apple M1.

Good luck!