Re:M1racles: An Apple M1 covert channel vulnerability
by afandian on Wednesday May 26, 2021 @03:13AM
(#27287348)
Sorry if I missed it, but what is the defined purpose of the s3_5_c15_c10_1 register? Or is it just general purpose?
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Re:M1racles: An Apple M1 covert channel vulnerability
by marcan_42 on Wednesday May 26, 2021 @03:43AM
(#27287570)
It's an implementation-defined register, which means it's up to Apple to define it. We have no idea what it does; we haven't observed any visible effects from flipping those bits. Given that it's per-cluster, we can infer that it has something to do with cluster-specific logic. Perhaps memory interface or power control.
There are hundreds of Apple implementation-defined registers; we're documenting them as we learn more about them [0] [1] [2]
[0] https://github.com/AsahiLinux/m1n1/blob/main/tools/apple_reg...
[1] https://github.com/AsahiLinux/docs/wiki/HW%3AARM-System-Regi...
[2] https://github.com/AsahiLinux/docs/wiki/HW%3AARM-System-Regi...
Re:M1racles: An Apple M1 covert channel vulnerability
by Cthulhu_ on Wednesday May 26, 2021 @03:29AM
(#27287461)
I googled it for you and err, came up blank, there's just two code references in some ASM code, the rest points to this resource. Weird, I would have thought things like this would have public documentation.
Re:M1racles: An Apple M1 covert channel vulnerability
by pthariensflame on Wednesday May 26, 2021 @03:38AM
(#27287524)
Re:M1racles: An Apple M1 covert channel vulnerability
by pthariensflame on Wednesday May 26, 2021 @03:38AM
(#27287519)
It’s not a standard ARM register; it’s implementation-defined and nobody gave it a meaningful name. It appears to do nothing much.