Re:Samsung Announces 512GB DDR5 Memory That Is Twice as Fast...
by corebuffer on Thursday March 25, 2021 @04:00PM
(#26584696)
honest question: what about throughput?
I see the issue on latency, but suppose this system is being consumed by a large GPU or a traditional out of order CPU or DMA mechanism. If you can start reads and writes over a high throughput pipe on many chips, can't you also get higher throughput to keep multiple parallel operations busy while requests are in flight?
I see the issue on latency, but suppose this system is being consumed by a large GPU or a traditional out of order CPU or DMA mechanism. If you can start reads and writes over a high throughput pipe on many chips, can't you also get higher throughput to keep multiple parallel operations busy while requests are in flight?