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Re:Lion: A formally verified, 5-stage pipeline RISC-V core by MrRadar on Thursday March 04, 2021 @10:09AM (#26343331)
Robert Baruch on Youtube is building a RISC-V CPU core of comparable complexity to the one in the OP using nMigen which is an HDL based on Python and it looks like a very nice tool to work with relative to other HDLs I've seen (though I've never had to actually use an HDL myself before so I may not be the best judge). Here's a playlist of the video series, with the earlier videos basically being an introduction to nMigen: https://www.youtube.com/watch?v=YgXJf8c5PLo&list=PLEeZWGE3Pw... He's got another series that's focused more on the HDL itself building a (relatively much simpler) 6800 CPU core: https://www.youtube.com/watch?v=85ZCTuekjGA&list=PLEeZWGE3Pw...

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