MIT 6.004 L14: Implementing RISC-V Processor in Hardware

Re:MIT 6.004 L14: Implementing RISC-V Processor in Hardware by egsmi on Saturday November 28, 2020 @02:18PM (#25239739)

This class’s version of RISC-V only implements of subset of all the possible instructions (which of course is totally appropriate) and it’s missing modern concepts (like out of order execution) which are also out of scope for an introductory class. One of the lectures describes basic logic gates so one doesn’t go from that to reorder buffers in a single quarter.

I think the Weste text book is an excellent introduction to the reality of (mostly) modern digital VLSI design. My only gripe is it’s weak on analog, which is my forte. For An introduction to the reality of that I think Baker’s text at cmosedu.com is better.

Basically, if you have interest in the subject buying a used copy of Weste is not likely to disappoint. Or perhaps see if your local library can snag a copy before you buy.

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Re:MIT 6.004 L14: Implementing RISC-V Processor in Hardware by bogomipz on Saturday November 28, 2020 @03:42PM (#25240366)

Oh I see. Yes it's a modular design. That's one of the most fascinating elements of the CPU. I wasn't familiar with the version terminology to denote features. Thanks. Also thank for the the feedback on the Weste book. I will try to find a used copy.

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Re:MIT 6.004 L14: Implementing RISC-V Processor in Hardware by egsmi on Wednesday December 09, 2020 @02:36PM (#25363378)

> familiar with the version terminology

That's probably because I was using the wrong word. I should've said "variant".

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