Re:Apple CPU tricks: memory reordering, JavaScript support, ...
by dathinab on Friday November 27, 2020 @08:28PM
(#25234294)
> What the hell does that even mean ?
> double the speed of reference counting
The simplest low latency system memory making atomics faster in some contexts (faster cache write back/fetch).
Then atomic operations (using Aquire/Release) are theoretically faster on ARM due to the weak memory ordering (I'm not sure if this does help for translated x86 code).
Potentially other reasons can include:
- maybe optimized fetch add/sub instructions (or more precise the ARM instructions used by fetch add/sub functions in higher level languages)
- maybe tweaks to the coherence protocol
- maybe specialized optimizations in the pipelineing
All in all it means Apple focused on making sure fetch add/sub are fast (most likely as this is what is normally used for Rc).
> double the speed of reference counting
The simplest low latency system memory making atomics faster in some contexts (faster cache write back/fetch).
Then atomic operations (using Aquire/Release) are theoretically faster on ARM due to the weak memory ordering (I'm not sure if this does help for translated x86 code).
Potentially other reasons can include:
- maybe optimized fetch add/sub instructions (or more precise the ARM instructions used by fetch add/sub functions in higher level languages)
- maybe tweaks to the coherence protocol
- maybe specialized optimizations in the pipelineing
All in all it means Apple focused on making sure fetch add/sub are fast (most likely as this is what is normally used for Rc).