Apple Silicon M1 Emulating x86 Is Still Faster Than Every Other Mac

Re:Apple Silicon M1 Emulating x86 Is Still Faster Than Every... by aparashk on Monday November 16, 2020 @07:08PM (#25118797)

You are correct, static binary translation is what Rosetta does first. That, however, is what I called niche technology in another post, most of the research so far had focused on dynamic binary translation.

Furthermore, SBT, even for user mode binaries, can rarely reach the performance levels that we see with Rosetta2. There are many issues in determining what is code, where are the branch destinations in case of indirect branches, etc. What we have here is certainly a feat of engineering on its own.

[ Parent | on HN ]

Re:Apple Silicon M1 Emulating x86 Is Still Faster Than Every... by avianes on Monday November 16, 2020 @08:05PM (#25119208)

> There are many issues in determining what is code, where are the branch destinations in case of indirect branches, etc.

Yes, handling indrect branch seems a bit complex and I'm not a specialist in the field. But I'm pretty sure that the cases of indirect branch are rare enough so that an additional indirection is relatively inexpensive. Adding a simple address mapping table should meet most of the cases.

An interesting question would also be whether Apple has added features to the hardware to improve the translation?

We know, for example, that Apple introduced a special register [1] to temporarily switch from the ARM consistency model to the TSO consistency model (Total Store Order) from x86.

[1] : https://github.com/saagarjha/TSOEnabler

[ Parent | on HN ]

Re:Apple Silicon M1 Emulating x86 Is Still Faster Than Every... by marcan_42 on Wednesday November 18, 2020 @12:00AM (#25133386)

C++ code with virtuals is basically all indirect branches for method calls.

[ Parent | on HN ]