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Re:An ex-ARM engineer critiques RISC-V by ansible on Sunday November 01, 2020 @08:38PM (#24964169)
> I thought that compilers couldn't really use this effectively…

The status bits part in general, or the speculative load stuff?

They allegedly have all this working, privately. They haven't released any development tools or such to the public.

I've often toyed with the idea of writing an instruction-level simulator (as opposed to the RTL sim or whatever they have internally). But even sticking to the public information, I'd likely be infringing on their patents.

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